Phase delays or temporal delays are utilized in a variety of electronic circuits. For example, an electronic circuit may receive a timing signal and adjust the timing or phase of such a timing signal for subsequent signal processing. An electronic circuit may utilize a timing adjustment sub-circuit to effect a temporal or phase adjustment for such a timing signal.
In various scenarios, the response of such a timing adjustment sub-circuit to a timing adjustment command may not be known to a desired degree of accuracy. For example and without limitation, manufacturing process variability may cause similarly designed circuits to behave differently. Also for example, operating condition variability may cause a circuit to behave differently at different times.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with the present invention as set forth in the remainder of the present application with reference to the drawings.